From 6d71f1d8264b929ca71bf133246b894ed955c079 Mon Sep 17 00:00:00 2001
From: mrDarker <mr.darker@163.com>
Date: 星期四, 12 六月 2025 15:17:50 +0800
Subject: [PATCH] Merge branch 'master' into liuyang

---
 SourceCode/Bond/Servo/CEFEM.cpp |   34 ++++++++++++++++++++++++++++++++++
 1 files changed, 34 insertions(+), 0 deletions(-)

diff --git a/SourceCode/Bond/Servo/CEFEM.cpp b/SourceCode/Bond/Servo/CEFEM.cpp
index 2ff94a2..9732129 100644
--- a/SourceCode/Bond/Servo/CEFEM.cpp
+++ b/SourceCode/Bond/Servo/CEFEM.cpp
@@ -626,6 +626,40 @@
 				delete pStep;
 			}
 		}
+
+		{
+			// Panel Data Report
+			CEqReadStep* pStep = new CEqReadStep(0x617f, 386 * 2,
+				[&](void* pFrom, int code, const char* pszData, size_t size) -> int {
+					if (code == ROK && pszData != nullptr && size > 0) {
+						decodePanelDataReport((CStep*)pFrom, pszData, size);
+					}
+					return -1;
+				});
+			pStep->setName(STEP_EQ_PANEL_DATA_REPORT);
+			pStep->setProp("Port", (void*)1);
+			pStep->setWriteSignalDev(0x15e);
+			if (addStep(STEP_ID_PANEL_DATA_REPORT, pStep) != 0) {
+				delete pStep;
+			}
+		}
+
+		{
+			// FAC Data Report
+			CEqReadStep* pStep = new CEqReadStep(0x6301, 108 * 2,
+				[&](void* pFrom, int code, const char* pszData, size_t size) -> int {
+					if (code == ROK && pszData != nullptr && size > 0) {
+						decodePanelDataReport((CStep*)pFrom, pszData, size);
+					}
+					return -1;
+				});
+			pStep->setName(STEP_EQ_FAC_DATA_REPORT);
+			pStep->setProp("Port", (void*)1);
+			pStep->setWriteSignalDev(0x04d);
+			if (addStep(STEP_ID_FAC_DATA_REPORT, pStep) != 0) {
+				delete pStep;
+			}
+		}
 	}
 
 	// 必须要实现的虚函数,在此初始化Slot信息

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