From 56fd8f57fcc763ae079ae752d82e41b38d7d9e5f Mon Sep 17 00:00:00 2001
From: mrDarker <mr.darker@163.com>
Date: 星期一, 16 六月 2025 10:50:16 +0800
Subject: [PATCH] Merge branch 'clh' into liuyang
---
SourceCode/Bond/Servo/CBonder.cpp | 37 ++++++++++++++++++++++++++++++++++++-
1 files changed, 36 insertions(+), 1 deletions(-)
diff --git a/SourceCode/Bond/Servo/CBonder.cpp b/SourceCode/Bond/Servo/CBonder.cpp
index 4a48f1e..db7cf76 100644
--- a/SourceCode/Bond/Servo/CBonder.cpp
+++ b/SourceCode/Bond/Servo/CBonder.cpp
@@ -34,7 +34,8 @@
{
// 加入Pin初始化代码
LOGI("<CBonder>initPins");
- addPin(SERVO::PinType::INPUT, _T("In"));
+ addPin(SERVO::PinType::INPUT, _T("In1"));
+ addPin(SERVO::PinType::INPUT, _T("In2"));
addPin(SERVO::PinType::OUTPUT, _T("Out"));
}
@@ -334,6 +335,40 @@
}
}
}
+
+ {
+ // Panel Data Report
+ CEqReadStep* pStep = new CEqReadStep(0xA17f, 386 * 2,
+ [&](void* pFrom, int code, const char* pszData, size_t size) -> int {
+ if (code == ROK && pszData != nullptr && size > 0) {
+ decodePanelDataReport((CStep*)pFrom, pszData, size);
+ }
+ return -1;
+ });
+ pStep->setName(STEP_EQ_PANEL_DATA_REPORT);
+ pStep->setProp("Port", (void*)1);
+ pStep->setWriteSignalDev(0x45e);
+ if (addStep(STEP_ID_PANEL_DATA_REPORT, pStep) != 0) {
+ delete pStep;
+ }
+ }
+
+ {
+ // FAC Data Report
+ CEqReadStep* pStep = new CEqReadStep(0xA60E, 108 * 2,
+ [&](void* pFrom, int code, const char* pszData, size_t size) -> int {
+ if (code == ROK && pszData != nullptr && size > 0) {
+ decodePanelDataReport((CStep*)pFrom, pszData, size);
+ }
+ return -1;
+ });
+ pStep->setName(STEP_EQ_FAC_DATA_REPORT);
+ pStep->setProp("Port", (void*)1);
+ pStep->setWriteSignalDev(0x34d);
+ if (addStep(STEP_ID_FAC_DATA_REPORT, pStep) != 0) {
+ delete pStep;
+ }
+ }
}
// 必须要实现的虚函数,在此初始化Slot信息
--
Gitblit v1.9.3