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| | | #include "Log.h" |
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| | | #define ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(name,ws,index,psd) { \ |
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| | | #define ADD_EQ_PORT_STATUS_STEP(name,ws,index,psd) { \ |
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| | | CEqCassetteTransferStateStep* pStep = new CEqCassetteTransferStateStep(); \ |
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| | | pStep->setName(name); \ |
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| | | pStep->setWriteSignalDev(ws); \ |
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| | |
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| | | } |
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| | | |
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| | | // CEqCassetteTranserStateStep |
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| | | ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(STEP_EQ_P1_CASSETTE_EMPTY, 0xd8, |
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| | | STEP_ID_PORT1_CASSETTIE_EMPTY, 0x6050); |
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| | | ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(STEP_EQ_P1_CASSETTE_LOAD_EADY, 0xe0, |
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| | | STEP_ID_PORT1_CASSETTIE_LOAD_READY, 0x6050); |
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| | | ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(STEP_EQ_P1_CASSETTE_LOADED, 0xe8, |
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| | | STEP_ID_PORT1_CASSETTIE_LOADED, 0x6050); |
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| | | ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(STEP_EQ_P1_CASSETTE_INUSE, 0xf0, |
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| | | STEP_ID_PORT1_CASSETTIE_INUSE, 0x6050); |
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| | | ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(STEP_EQ_P1_CASSETTE_UNLOAD_EADY, 0xf8, |
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| | | STEP_ID_PORT1_CASSETTIE_UNLOAD_READY, 0x60f50); |
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| | | ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(STEP_EQ_P1_CASSETTE_BLOCKED, 0x100, |
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| | | STEP_ID_PORT1_CASSETTIE_BLOCKED, 0x6050); |
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| | | ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(STEP_EQ_P2_CASSETTE_EMPTY, 0xd9, |
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| | | STEP_ID_PORT2_CASSETTIE_EMPTY, 0x6070); |
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| | | ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(STEP_EQ_P2_CASSETTE_LOAD_EADY, 0xe1, |
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| | | STEP_ID_PORT2_CASSETTIE_LOAD_READY, 0x6070); |
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| | | ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(STEP_EQ_P2_CASSETTE_LOADED, 0xe9, |
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| | | STEP_ID_PORT2_CASSETTIE_LOADED, 0x6070); |
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| | | ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(STEP_EQ_P2_CASSETTE_INUSE, 0xf1, |
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| | | STEP_ID_PORT2_CASSETTIE_INUSE, 0x6070); |
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| | | ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(STEP_EQ_P2_CASSETTE_UNLOAD_EADY, 0xf9, |
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| | | STEP_ID_PORT2_CASSETTIE_UNLOAD_READY, 0x6070); |
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| | | ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(STEP_EQ_P2_CASSETTE_BLOCKED, 0x101, |
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| | | STEP_ID_PORT2_CASSETTIE_BLOCKED, 0x6070); |
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| | | ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(STEP_EQ_P3_CASSETTE_EMPTY, 0xda, |
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| | | STEP_ID_PORT3_CASSETTIE_EMPTY, 0x6090); |
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| | | ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(STEP_EQ_P3_CASSETTE_LOAD_EADY, 0xe2, |
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| | | STEP_ID_PORT3_CASSETTIE_LOAD_READY, 0x6090); |
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| | | ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(STEP_EQ_P3_CASSETTE_LOADED, 0xea, |
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| | | STEP_ID_PORT3_CASSETTIE_INUSE, 0x6090); |
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| | | ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(STEP_EQ_P3_CASSETTE_INUSE, 0xf2, |
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| | | STEP_ID_PORT3_CASSETTIE_INUSE, 0x6090); |
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| | | ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(STEP_EQ_P3_CASSETTE_UNLOAD_EADY, 0xfa, |
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| | | STEP_ID_PORT3_CASSETTIE_UNLOAD_READY, 0x6090); |
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| | | ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(STEP_EQ_P3_CASSETTE_BLOCKED, 0x102, |
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| | | STEP_ID_PORT3_CASSETTIE_BLOCKED, 0x6090); |
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| | | ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(STEP_EQ_P4_CASSETTE_EMPTY, 0xdb, |
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| | | STEP_ID_PORT4_CASSETTIE_EMPTY, 0x60b0); |
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| | | ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(STEP_EQ_P4_CASSETTE_LOAD_EADY, 0xe3, |
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| | | STEP_ID_PORT4_CASSETTIE_LOAD_READY, 0x60b0); |
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| | | ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(STEP_EQ_P4_CASSETTE_LOADED, 0xeb, |
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| | | STEP_ID_PORT4_CASSETTIE_LOADED, 0x60b0); |
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| | | ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(STEP_EQ_P4_CASSETTE_INUSE, 0xf3, |
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| | | STEP_ID_PORT4_CASSETTIE_INUSE, 0x60b0); |
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| | | ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(STEP_EQ_P4_CASSETTE_UNLOAD_EADY, 0xfb, |
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| | | STEP_ID_PORT4_CASSETTIE_UNLOAD_READY, 0x60b0); |
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| | | ADD_EQ_CASSETTE_TRANSFER_STATE_STEP(STEP_EQ_P4_CASSETTE_BLOCKED, 0x103, |
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| | | STEP_ID_PORT4_CASSETTIE_BLOCKED, 0x60b0); |
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| | | ADD_EQ_PORT_STATUS_STEP(STEP_EQ_PORT1_EMPTY, 0xd8, |
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| | | STEP_ID_PORT1_EMPTY, 0x6050); |
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| | | ADD_EQ_PORT_STATUS_STEP(STEP_EQ_PORT1_LOAD_EADY, 0xe0, |
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| | | STEP_ID_PORT1_LOAD_READY, 0x6050); |
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| | | ADD_EQ_PORT_STATUS_STEP(STEP_EQ_PORT1_LOADED, 0xe8, |
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| | | STEP_ID_PORT1_LOADED, 0x6050); |
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| | | ADD_EQ_PORT_STATUS_STEP(STEP_EQ_PORT1_INUSE, 0xf0, |
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| | | STEP_ID_PORT1_INUSE, 0x6050); |
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| | | ADD_EQ_PORT_STATUS_STEP(STEP_EQ_PORT1_UNLOAD_EADY, 0xf8, |
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| | | STEP_ID_PORT1_UNLOAD_READY, 0x60f50); |
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| | | ADD_EQ_PORT_STATUS_STEP(STEP_EQ_PORT1_BLOCKED, 0x100, |
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| | | STEP_ID_PORT1_BLOCKED, 0x6050); |
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| | | ADD_EQ_PORT_STATUS_STEP(STEP_EQ_PORT2_EMPTY, 0xd9, |
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| | | STEP_ID_PORT2_EMPTY, 0x6070); |
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| | | ADD_EQ_PORT_STATUS_STEP(STEP_EQ_PORT2_LOAD_EADY, 0xe1, |
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| | | STEP_ID_PORT2_LOAD_READY, 0x6070); |
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| | | ADD_EQ_PORT_STATUS_STEP(STEP_EQ_PORT2_LOADED, 0xe9, |
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| | | STEP_ID_PORT2_LOADED, 0x6070); |
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| | | ADD_EQ_PORT_STATUS_STEP(STEP_EQ_PORT2_INUSE, 0xf1, |
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| | | STEP_ID_PORT2_INUSE, 0x6070); |
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| | | ADD_EQ_PORT_STATUS_STEP(STEP_EQ_PORT2_UNLOAD_EADY, 0xf9, |
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| | | STEP_ID_PORT2_UNLOAD_READY, 0x6070); |
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| | | ADD_EQ_PORT_STATUS_STEP(STEP_EQ_PORT2_BLOCKED, 0x101, |
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| | | STEP_ID_PORT2_BLOCKED, 0x6070); |
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| | | ADD_EQ_PORT_STATUS_STEP(STEP_EQ_PORT3_EMPTY, 0xda, |
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| | | STEP_ID_PORT3_EMPTY, 0x6090); |
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| | | ADD_EQ_PORT_STATUS_STEP(STEP_EQ_PORT3_LOAD_EADY, 0xe2, |
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| | | STEP_ID_PORT3_LOAD_READY, 0x6090); |
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| | | ADD_EQ_PORT_STATUS_STEP(STEP_EQ_PORT3_LOADED, 0xea, |
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| | | STEP_ID_PORT3_INUSE, 0x6090); |
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| | | ADD_EQ_PORT_STATUS_STEP(STEP_EQ_PORT3_INUSE, 0xf2, |
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| | | STEP_ID_PORT3_INUSE, 0x6090); |
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| | | ADD_EQ_PORT_STATUS_STEP(STEP_EQ_PORT3_UNLOAD_EADY, 0xfa, |
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| | | STEP_ID_PORT3_UNLOAD_READY, 0x6090); |
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| | | ADD_EQ_PORT_STATUS_STEP(STEP_EQ_PORT3_BLOCKED, 0x102, |
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| | | STEP_ID_PORT3_BLOCKED, 0x6090); |
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| | | ADD_EQ_PORT_STATUS_STEP(STEP_EQ_PORT4_EMPTY, 0xdb, |
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| | | STEP_ID_PORT4_EMPTY, 0x60b0); |
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| | | ADD_EQ_PORT_STATUS_STEP(STEP_EQ_PORT4_LOAD_EADY, 0xe3, |
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| | | STEP_ID_PORT4_LOAD_READY, 0x60b0); |
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| | | ADD_EQ_PORT_STATUS_STEP(STEP_EQ_PORT4_LOADED, 0xeb, |
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| | | STEP_ID_PORT4_LOADED, 0x60b0); |
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| | | ADD_EQ_PORT_STATUS_STEP(STEP_EQ_PORT4_INUSE, 0xf3, |
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| | | STEP_ID_PORT4_INUSE, 0x60b0); |
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| | | ADD_EQ_PORT_STATUS_STEP(STEP_EQ_PORT4_UNLOAD_EADY, 0xfb, |
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| | | STEP_ID_PORT4_UNLOAD_READY, 0x60b0); |
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| | | ADD_EQ_PORT_STATUS_STEP(STEP_EQ_PORT4_BLOCKED, 0x103, |
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| | | STEP_ID_PORT4_BLOCKED, 0x60b0); |
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| | | |
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| | | { |
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| | | // Received Job Report Upstream#1~9 |
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| | |
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| | | delete pStep; |
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| | | } |
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| | | } |
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| | | } |
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| | | |
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| | | int CEFEM::onStepEvent(CStep* pStep, int code) |
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| | | { |
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| | | int nRet = CEquipment::onStepEvent(pStep, code); |
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| | | if (nRet > 0) return nRet; |
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| | | |
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| | | if (code == STEP_EVENT_READDATA) { |
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| | | if (isCassetteTransferStateStep(pStep)) { |
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| | | SERVO::CEqCassetteTransferStateStep* pEqCassetteStep = (SERVO::CEqCassetteTransferStateStep*)pStep; |
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| | | int id = pEqCassetteStep->getID(); |
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| | | if (id == STEP_ID_PORT1_CASSETTIE_EMPTY) { |
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| | | |
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| | | } |
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| | | } |
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| | | } |
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| | | |
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| | | return 0; |
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| | | } |
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| | | |
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| | | void CEFEM::onTimer(UINT nTimerid) |
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| | |
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| | | virtual void term(); |
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| | | virtual void initPins(); |
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| | | virtual void initSteps(); |
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| | | virtual int onStepEvent(CStep* pStep, int code); |
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| | | virtual void onTimer(UINT nTimerid); |
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| | | virtual void serialize(CArchive& ar); |
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| | | virtual void getAttributeVector(CAttributeVector& attrubutes); |
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| | | |
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| | | // CEqCassetteTranserStateStep |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT1_CASSETTIE_EMPTY, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT1_CASSETTIE_LOAD_READY, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT1_CASSETTIE_LOADED, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT1_CASSETTIE_INUSE, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT1_CASSETTIE_UNLOAD_READY, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT1_CASSETTIE_BLOCKED, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT2_CASSETTIE_EMPTY, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT2_CASSETTIE_LOAD_READY, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT2_CASSETTIE_LOADED, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT2_CASSETTIE_INUSE, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT2_CASSETTIE_UNLOAD_READY, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT2_CASSETTIE_BLOCKED, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT3_CASSETTIE_EMPTY, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT3_CASSETTIE_LOAD_READY, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT3_CASSETTIE_LOADED, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT3_CASSETTIE_INUSE, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT3_CASSETTIE_UNLOAD_READY, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT3_CASSETTIE_BLOCKED, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT4_CASSETTIE_EMPTY, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT4_CASSETTIE_LOAD_READY, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT4_CASSETTIE_LOADED, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT4_CASSETTIE_INUSE, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT4_CASSETTIE_UNLOAD_READY, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT4_CASSETTIE_BLOCKED, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT1_EMPTY, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT1_LOAD_READY, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT1_LOADED, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT1_INUSE, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT1_UNLOAD_READY, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT1_BLOCKED, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT2_EMPTY, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT2_LOAD_READY, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT2_LOADED, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT2_INUSE, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT2_UNLOAD_READY, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT2_BLOCKED, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT3_EMPTY, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT3_LOAD_READY, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT3_LOADED, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT3_INUSE, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT3_UNLOAD_READY, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT3_BLOCKED, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT4_EMPTY, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT4_LOAD_READY, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT4_LOADED, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT4_INUSE, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT4_UNLOAD_READY, pszData, size); |
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| | | CHECK_READ_STEP_SIGNAL(STEP_ID_PORT4_BLOCKED, pszData, size); |
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| | | } |
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| | | |
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| | | BOOL CEquipment::isBitOn(const char* pszData, size_t size, int index) |
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| | |
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| | | #define STEP_EQ_PORT4_TRANSFER_MODE _T("EQPort4TransferMode") |
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| | | #define STEP_EQ_PORT4_ENABLE _T("EQPort4Enable") |
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| | | #define STEP_EQ_PORT4_TYPE_ATUO _T("EQPort4TypeAuto") |
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| | | #define STEP_EQ_P1_CASSETTE_EMPTY _T("EQPort1CassetteEmpty") |
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| | | #define STEP_EQ_P1_CASSETTE_LOAD_EADY _T("EQPort1CassetteLoadReady") |
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| | | #define STEP_EQ_P1_CASSETTE_LOADED _T("EQPort1CassetteLoaded") |
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| | | #define STEP_EQ_P1_CASSETTE_INUSE _T("EQPort1CassetteInUse") |
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| | | #define STEP_EQ_P1_CASSETTE_UNLOAD_EADY _T("EQPort1CassetteUnloadReady") |
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| | | #define STEP_EQ_P1_CASSETTE_BLOCKED _T("EQPort1CassetteBlocked") |
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| | | #define STEP_EQ_P2_CASSETTE_EMPTY _T("EQPort2CassetteEmpty") |
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| | | #define STEP_EQ_P2_CASSETTE_LOAD_EADY _T("EQPort2CassetteLoadReady") |
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| | | #define STEP_EQ_P2_CASSETTE_LOADED _T("EQPort2CassetteLoaded") |
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| | | #define STEP_EQ_P2_CASSETTE_INUSE _T("EQPort2CassetteInUse") |
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| | | #define STEP_EQ_P2_CASSETTE_UNLOAD_EADY _T("EQPort2CassetteUnloadReady") |
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| | | #define STEP_EQ_P2_CASSETTE_BLOCKED _T("EQPort2CassetteBlocked") |
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| | | #define STEP_EQ_P3_CASSETTE_EMPTY _T("EQPort3CassetteEmpty") |
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| | | #define STEP_EQ_P3_CASSETTE_LOAD_EADY _T("EQPort3CassetteLoadReady") |
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| | | #define STEP_EQ_P3_CASSETTE_LOADED _T("EQPort3CassetteLoaded") |
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| | | #define STEP_EQ_P3_CASSETTE_INUSE _T("EQPort3CassetteInUse") |
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| | | #define STEP_EQ_P3_CASSETTE_UNLOAD_EADY _T("EQPort3CassetteUnloadReady") |
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| | | #define STEP_EQ_P3_CASSETTE_BLOCKED _T("EQPort3CassetteBlocked") |
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| | | #define STEP_EQ_P4_CASSETTE_EMPTY _T("EQPort4CassetteEmpty") |
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| | | #define STEP_EQ_P4_CASSETTE_LOAD_EADY _T("EQPort4CassetteLoadReady") |
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| | | #define STEP_EQ_P4_CASSETTE_LOADED _T("EQPort4CassetteLoaded") |
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| | | #define STEP_EQ_P4_CASSETTE_INUSE _T("EQPort4CassetteInUse") |
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| | | #define STEP_EQ_P4_CASSETTE_UNLOAD_EADY _T("EQPort4CassetteUnloadReady") |
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| | | #define STEP_EQ_P4_CASSETTE_BLOCKED _T("EQPort4CassetteBlocked") |
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| | | #define STEP_EQ_PORT1_EMPTY _T("EQPort1Empty") |
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| | | #define STEP_EQ_PORT1_LOAD_EADY _T("EQPort1LoadReady") |
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| | | #define STEP_EQ_PORT1_LOADED _T("EQPort1Loaded") |
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| | | #define STEP_EQ_PORT1_INUSE _T("EQPort1InUse") |
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| | | #define STEP_EQ_PORT1_UNLOAD_EADY _T("EQPort1UnloadReady") |
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| | | #define STEP_EQ_PORT1_BLOCKED _T("EQPort1Blocked") |
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| | | #define STEP_EQ_PORT2_EMPTY _T("EQPort2Empty") |
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| | | #define STEP_EQ_PORT2_LOAD_EADY _T("EQPort2LoadReady") |
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| | | #define STEP_EQ_PORT2_LOADED _T("EQPort2Loaded") |
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| | | #define STEP_EQ_PORT2_INUSE _T("EQPort2InUse") |
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| | | #define STEP_EQ_PORT2_UNLOAD_EADY _T("EQPort2UnloadReady") |
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| | | #define STEP_EQ_PORT2_BLOCKED _T("EQPort2Blocked") |
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| | | #define STEP_EQ_PORT3_EMPTY _T("EQPort3Empty") |
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| | | #define STEP_EQ_PORT3_LOAD_EADY _T("EQPort3LoadReady") |
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| | | #define STEP_EQ_PORT3_LOADED _T("EQPort3Loaded") |
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| | | #define STEP_EQ_PORT3_INUSE _T("EQPort3InUse") |
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| | | #define STEP_EQ_PORT3_UNLOAD_EADY _T("EQPort3UnloadReady") |
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| | | #define STEP_EQ_PORT3_BLOCKED _T("EQPort3Blocked") |
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| | | #define STEP_EQ_PORT4_EMPTY _T("EQPort4Empty") |
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| | | #define STEP_EQ_PORT4_LOAD_EADY _T("EQPort4LoadReady") |
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| | | #define STEP_EQ_PORT4_LOADED _T("EQPort4Loaded") |
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| | | #define STEP_EQ_PORT4_INUSE _T("EQPort4InUse") |
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| | | #define STEP_EQ_PORT4_UNLOAD_EADY _T("EQPort4UnloadReady") |
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| | | #define STEP_EQ_PORT4_BLOCKED _T("EQPort4Blocked") |
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| | | #define STEP_EQ_P1_CASSETTE_CTRL_CMD _T("EQPort1CassetteCtrlCmd") |
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| | | #define STEP_EQ_P2_CASSETTE_CTRL_CMD _T("EQPort2CassetteCtrlCmd") |
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| | | #define STEP_EQ_P3_CASSETTE_CTRL_CMD _T("EQPort3CassetteCtrlCmd") |
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| | | #define STEP_ID_PORT2_TYPE_AUTO_CHANGE 0x629 |
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| | | #define STEP_ID_PORT3_TYPE_AUTO_CHANGE 0x62A |
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| | | #define STEP_ID_PORT4_TYPE_AUTO_CHANGE 0x62B |
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| | | #define STEP_ID_PORT1_CASSETTIE_EMPTY 0x638 |
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| | | #define STEP_ID_PORT1_CASSETTIE_LOAD_READY 0x640 |
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| | | #define STEP_ID_PORT1_CASSETTIE_LOADED 0x648 |
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| | | #define STEP_ID_PORT1_CASSETTIE_INUSE 0x650 |
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| | | #define STEP_ID_PORT1_CASSETTIE_UNLOAD_READY 0x658 |
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| | | #define STEP_ID_PORT1_CASSETTIE_BLOCKED 0x660 |
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| | | #define STEP_ID_PORT2_CASSETTIE_EMPTY 0x639 |
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| | | #define STEP_ID_PORT2_CASSETTIE_LOAD_READY 0x641 |
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| | | #define STEP_ID_PORT2_CASSETTIE_LOADED 0x649 |
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| | | #define STEP_ID_PORT2_CASSETTIE_INUSE 0x651 |
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| | | #define STEP_ID_PORT2_CASSETTIE_UNLOAD_READY 0x659 |
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| | | #define STEP_ID_PORT2_CASSETTIE_BLOCKED 0x661 |
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| | | #define STEP_ID_PORT3_CASSETTIE_EMPTY 0x63a |
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| | | #define STEP_ID_PORT3_CASSETTIE_LOAD_READY 0x642 |
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| | | #define STEP_ID_PORT3_CASSETTIE_LOADED 0x64a |
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| | | #define STEP_ID_PORT3_CASSETTIE_INUSE 0x652 |
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| | | #define STEP_ID_PORT3_CASSETTIE_UNLOAD_READY 0x65a |
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| | | #define STEP_ID_PORT3_CASSETTIE_BLOCKED 0x662 |
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| | | #define STEP_ID_PORT4_CASSETTIE_EMPTY 0x63b |
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| | | #define STEP_ID_PORT4_CASSETTIE_LOAD_READY 0x643 |
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| | | #define STEP_ID_PORT4_CASSETTIE_LOADED 0x64b |
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| | | #define STEP_ID_PORT4_CASSETTIE_INUSE 0x653 |
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| | | #define STEP_ID_PORT4_CASSETTIE_UNLOAD_READY 0x65b |
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| | | #define STEP_ID_PORT4_CASSETTIE_BLOCKED 0x663 |
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| | | #define STEP_ID_PORT1_EMPTY 0x638 |
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| | | #define STEP_ID_PORT1_LOAD_READY 0x640 |
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| | | #define STEP_ID_PORT1_LOADED 0x648 |
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| | | #define STEP_ID_PORT1_INUSE 0x650 |
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| | | #define STEP_ID_PORT1_UNLOAD_READY 0x658 |
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| | | #define STEP_ID_PORT1_BLOCKED 0x660 |
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| | | #define STEP_ID_PORT2_EMPTY 0x639 |
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| | | #define STEP_ID_PORT2_LOAD_READY 0x641 |
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| | | #define STEP_ID_PORT2_LOADED 0x649 |
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| | | #define STEP_ID_PORT2_INUSE 0x651 |
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| | | #define STEP_ID_PORT2_UNLOAD_READY 0x659 |
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| | | #define STEP_ID_PORT2_BLOCKED 0x661 |
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| | | #define STEP_ID_PORT3_EMPTY 0x63a |
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| | | #define STEP_ID_PORT3_LOAD_READY 0x642 |
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| | | #define STEP_ID_PORT3_LOADED 0x64a |
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| | | #define STEP_ID_PORT3_INUSE 0x652 |
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| | | #define STEP_ID_PORT3_UNLOAD_READY 0x65a |
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| | | #define STEP_ID_PORT3_BLOCKED 0x662 |
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| | | #define STEP_ID_PORT4_EMPTY 0x63b |
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| | | #define STEP_ID_PORT4_LOAD_READY 0x643 |
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| | | #define STEP_ID_PORT4_LOADED 0x64b |
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| | | #define STEP_ID_PORT4_INUSE 0x653 |
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| | | #define STEP_ID_PORT4_UNLOAD_READY 0x65b |
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| | | #define STEP_ID_PORT4_BLOCKED 0x663 |
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| | | #define STEP_ID_ROBOT_CMD_REPLY 0x6b0 |
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